Showing posts with label vlsi. Show all posts
Showing posts with label vlsi. Show all posts

Monday, February 13, 2023

Digital Design using HDL- Module 2

Digital Design Using HDL

Content Link
Module 2 PPT Module 2 PPT
Module 2 Notes Module 2
Module 2 Questions Update Soon...

Tuesday, December 27, 2022

VLSI Design Lab Model Questions paper - R19 JNTUA

VLSI Design Lab

Content Link
Lab Model Question Click Here to download

Sunday, December 11, 2022

VLSI Design Notes - R19 - JNTUA

VLSI Design

Content Link
Syllabus Click Here for Syllabus
VLSI Lab manual Part A VLSI LAB Manual - PART A
VLSI Design Unit IV Notes VLSI Design Unit IV Notes
VLSI Design Unit V Notes VLSI Design Unit V Notes

Monday, September 26, 2022

VLSI Design - Unit 1 Introduction and MOS Electrical Characteristics

1.       Explain the NMOS fabrication process flow with diagrams.

2.        

a.        Explain clearly the n-well CMOS fabrication process with diagrams. (May 2019).

b.       Explain the operation of the V-I characteristics of NMOS

3.       transistor with a diagram and derive the drain to source current

4.       Equation in saturation and resistance region. (May 2019).

5.       Explain the latch-up effect in CMOS inverter

6.        

a.       Explain the fabrication process of Twin Tub.

b.      . Compare CMOS and BI-CMOS technology.

7.        

a.       Explain the operation of CMOS inverter with a diagram.

b.      Discuss MOS design equations role in Ids –Vds relationship curve. (may/June 2018)

8.       Interpret the Pull-up to pull-down ratio (Zpu-Zpd) for an nMOS inverter driven by another nMOS inverter.

9.        

a.       Explain the Various forms of pull-ups

b.       Illustrate the relationship Ids Versus Vds of MOSFET

10.   Design a stick and layout diagram for CMOS inverter and two input n-MOS NAND.

Tuesday, September 13, 2022

VLSI LAB - Experiment

VLSI Design

Content Link
Syllabus Click Here for Syllabus
VLSI Lab manual Part A VLSI LAB Manual - PART A
Essay Question and Answer Coming Soon

Sunday, August 14, 2022

Download JNTU Anantapur (JNTUA) B-Tech 2019 Final Year First Semester R19 Regulation previous year R15 VLSI Design Questions for Reference and Download the important Question bank of R19

VLSI Design

Download JNTU Anantapur (JNTUA) B-Tech 2019 Final Year First Semester R19 Rrgulation - VLSI Design - (19A04702T) syllabus Latest updated from the below link

Download JNTU Anantapur (JNTUA) B-Tech 2019 Final Year First Semester R19 Rrgulation - VLSI Design - (19A04702T) -Introdcution to Course objective , CO PO PSO mapping of the syllabus and NBA Formt. Download the Slide for the Bloom's Taxonomy level.

Download JNTU Anantapur (JNTUA) B-Tech 2019 Final Year First Semester R19 Regulation previous year R15 VLSI Design Questions for Reference and Download the important Question bank of R19

Content Link
Syllabus Click Here for Syllabus
Introduction Introdcution, Vision- Msiion-CO-PO-PSO- PEO
VLSI LAB Experiment 1
Unit 1 Questions
University Question papers University Qustions
Unit 1 Question and Answer Unit 1 Question and Answer
Unit 1 PPT Unit 1 PPT